I am a Ph.D. student in the School of Electronic and Electrical Engineering at Kyungpook National University , advised by Prof. Daejin Park from Sep. 2019. I received a bachelor’s degree of Electronics Engineering from the same university at Aug. 2019 (early graduation).

My research mainly focuses on efficient accelerators for MCU, AP architecture, with contributions in:

• SW FW Efficient MCU firmware: I have worked extensively on tackling challenges for on-chip flash firmware update, such as robustness, and efficiency. My work includes achieving efficient IoT sensor nodes.
• HW Efficient hardware design: I work to comprehensively mitigate hardware overhead, including Armv6 ISA compatible CNN accelerators, ADC error compensation with MLP, and customized accelerator controllers. Some of my recent work, including MPW chips, is currently under review.
• HW SW Efficient software-embedded SoC verification platform: My work includes an emulator-simulator mixed framework to speed up partial RTL verification within SoCs driven by embedded software.
• HW Automotive IP RTL Design: My work includes communication interface module RTL design and AMBA bus integration for automotive sensor ASICs, such as DSI3, SENT, I2S.

My research aims to achieve efficient AI accelerator utilization and orchestration by tightly-coupling all full-stack layers of HW, SW, and FW. My 20+ published papers will be the basis of my research goal.

I was selected as the first integrated B.S./M.S./Ph.D. student at university and was awarded a Ph.D. Research Fellowship from the National Research Foundation (NRF) of Korea.